1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device and, more particularly to a gettering technique for effectively removing metal impurities which are unintentionally introduced into a semiconductor substrate in a manufacturing process of a semiconductor device.
2. Description of the Related Art
An ion implanting process is indispensable to manufacture a semiconductor device such as an LSI (Large Scale Integrated circuit). However, the ion implanting process is a process in which contaminating heavy metal elements are introduced into a semiconductor substrate. For example, refer to xe2x80x9cImpurity behavior and gettering in Sixe2x80x9d by Yoshinori HAYAFUJI (a first reference, Japanese Applied Physics, Vol. 60, No. 8, pp. 782-789).
Further, when forming a well, after impurity ions are implanted, a heat treatment is performed at the temperature of 1,000xc2x0 C. or higher to drive the implanted ions in a semiconductor substrate. Such a high temperature heat treatment is a process in which contaminating heavy metal elements are further introduced since the solid solubility of the contaminating heavy metal elements for a silicon substrate increases. Since the contaminating heavy metal elements introduced as mentioned above are a cause of large junction leakage current, a countermeasure is also required to reduce or eliminate contaminating metal impurities.
The gettering technique is an effective countermeasure technique for removing the contaminating heavy metal elements introduced as mentioned above, from device active regions of the semiconductor substrate.
As one intrinsic gettering (IG) method which is most generally used, a gettering method according to oxygen precipitates is known. Since supersaturated contaminating elements are gettered in the oxygen precipitates gettering method, the concentration of the contaminating elements which remain in the silicon wafer without being gettered does not decrease to the solid solubility.
As another gettering technique, a polysilicon back sealing method (to be referred to as a xe2x80x9cPBS methodxe2x80x9d, hereinafter) is known in which a polysilicon film is deposited on a surface of a silicon wafer on which a semiconductor device is not formed.
The gettering mechanism of the PBS method utilizes xe2x80x9csegregationxe2x80x9d. Therefore, since the concentration of the contaminating elements remaining after the gettering is not limited by the solid solubility, this mechanism is considered to be more effective when cleaning technology in the manufacturing process of the semiconductor device is advanced. For example, refer to xe2x80x9cEvaluation of Gettering Efficiency in Silicon Waferxe2x80x9d by Yoshinori Hayamizua et al., (second reference: the Technical report of the Institute of Electronics, Information and Communication Engineersxe2x80x9d, SDM-93-165, Dec. 1993, pp. 83-89).
In the method, however, there is a problem in that warpage occurs in a wafer since the polysilicon film is deposited on the silicon wafer usually to have a film thickness of 1000 nm or more. The problem is regarded as more important with the increase of wafer size in diameter.
A first conventional example of manufacturing method for solving such a problem is disclosed in, for example, Japanese Laid Open Patent Disclosure (JP-A-Heisei 5-109736). In the first conventional example of the semiconductor device manufacturing method, first, a gate oxide film is formed on the main front surface of a silicon wafer on which a semiconductor device is formed. After that, in a state in which the back surface of the silicon wafer is exposed, a first polysilicon film and a second polysilicon film are deposited onto both of the front and back surfaces of the silicon wafer.
Subsequently, ion implantation or phosphorus diffusion is performed to the first and second polysilicon films, thereby forming a first low resistance polysilicon film and a second low resistance polysilicon film, respectively.
Finally, the first low resistance polysilicon film is selectively etched and a gate electrode is formed.
According to the first conventional example of semiconductor device manufacturing method, since the polysilicon films exist on both of the front and back surfaces of the silicon wafer, the above-mentioned problem of the warpage is solved. The method has a process of forming the second polysilicon film as the second low resistance polysilicon film. Since the gettering ability of the second low resistance polysilicon film is stronger than that of the second polysilicon film, the first conventional example of the semiconductor device manufacturing method not only solves the problem of the warpage but also improves the gettering ability. Consequently, even when the diameter of the silicon wafer is increased, the conventional PBS method can be effective.
However, there is the following problem in the conventional PBS method. That is, fine patterning processes and high integration of the semiconductor device are also progressing more and more even at present. Thus, it is necessary to suppress diffusion of dopants in the portion where a transistor is formed. Also, it is necessary to decrease the temperature of heat treatment in the manufacturing process of the semiconductor device and to shorten the time of the heat treatment. Although a diffusion coefficient of the contaminating elements such as iron, nickel, copper, or the like is larger than that of the dopants such as phosphorus and boron, the decrease of the heat treatment temperature and shortening of the time of the heat treatment causes a problem for the gettering. This is because the contaminating elements unintentionally introduced by the ion implantation need to be diffused from the wafer front surface to the wafer back surface where gettering sites are present.
The gettering site of the PBS method is a grain boundary in the polysilicon film deposited on the back surface of the silicon wafer. For this reason, for purpose of the gettering of the contaminating elements, it is necessary that they are diffused from the wafer front surface by a distance corresponding to the thickness of the silicon wafer and reach the polysilicon film on the back surface of the wafer.
As mentioned above, in the PBS method, when the decrease in temperature and shortening of time of the heat treatment in the manufacturing process of the semiconductor device are advanced, there is a problem in that the diffusion length of the contaminating elements is limited so that the gettering becomes difficult.
Another gettering method is disclosed in Japanese Laid Open Patent Disclosure (JP-A-Heisei 6-140410) in which a polysilicon film and a silicon oxide film are formed on a wafer to collect contaminating elements between the polysilicon film and the silicon oxide film using PoCl3 and then the silicon oxide film is etched to remove the gettered elements.
Still another gettering method is disclosed in Japanese Laid Open Patent Disclosure (JP-A-Heisei 4-206932) in which an element isolation film is formed on a polysilicon film which is formed on a part of a wafer and a silicon oxide film are formed on a wafer, an epitaxy layer is formed on the other part of the wafer so as to form a semiconductor device on the epitaxy layer.
The invention is made to solve the above-mentioned problems. Therefore, an object of the invention is to provide a method of manufacturing a semiconductor device, in which contaminating elements which are unintentionally introduced in a semiconductor substrate during a manufacturing process of the semiconductor device can be efficiently gettered and removed.
Another object of the invention is to provide a method of manufacturing a semiconductor device in which a manufacturing yield of the semiconductor device is improved and productivity is improved.
In order to achieve an aspect of the present invention, a method of manufacturing a semiconductor device, includes the steps of:
forming a first polysilicon film on a surface of a semiconductor substrate on which a semiconductor element is to be formed;
performing ion implantation such that impurity ions are implanted into the semiconductor substrate surface through the first polysilicon film;
heating the semiconductor substrate to a first temperature after the step of performing ion implantation;
gradually cooling the semiconductor substrate with a predetermined cooling rate at least from a second temperature to a third temperature while the semiconductor substrate is cooled from the first temperature, the second and third temperatures being lower than the first temperature; and
removing the polysilicon film after the gradually cooling step.
The second temperature is preferably 800xc2x0 C. and the third temperature is preferably 600xc2x0 C. The heating step may be performed to activate the implanted impurity ions. The gradually cooling step may be performed to hold the semiconductor substrate at a fourth temperature during the gradually cooling step. The fourth temperature being equal to or lower than the second temperature and equal to or higher than the third temperature. In this case, the fourth temperature is in a range of 600xc2x0 C. to 700xc2x0 C.
The method may further include the step of forming an additional polysilicon film on the polysilicon film before the heating step. In this case, the polysilicon film and the additional polysilicon film are removed after the gradually cooling step.
The method may further include the step of forming a silicon oxide film between the semiconductor substrate surface and the polysilicon film before the step of forming the polysilicon film.
In order to achieve another aspect of the present invention, a method of manufacturing a semiconductor device, includes the steps of:
forming a silicon oxide film on a surface of a silicon substrate;
forming a first polysilicon film on the silicon oxide film;
forming a silicon nitride pattern on the first polysilicon film;
performing ion implantation such that impurity ions are implanted into the semiconductor substrate surface through the first polysilicon film and the silicon oxide film;
heating the semiconductor substrate to a first temperature after the step of performing ion implantation;
gradually cooling the semiconductor substrate with a predetermined cooling rate at least from a second temperature to a third temperature while the semiconductor substrate is cooled from the first temperature, the second and third temperatures being lower than the first temperature; and
removing the first polysilicon film and the silicon nitride pattern after the gradually cooling step.
In this case, the silicon oxide film preferably has a film thickness equal to or thinner than 10 nm.